Researchers from the University of Cambridge successfully developed a fully printed transistor technology with high gain, low power, low noise, and mechanical bendability that unlocks new possibilities in wearable and implantable technology. The printed transistor readily lends itself to analog sensor interfaces in wearables for electrophysiological signal monitoring at ultralow power and high-resolution.

Wearable and implantable electronics have enabled electronic devices that can monitor humans in real time for continuous healthcare management. Although a number of products have been successful in the market, several fundamental requirements still need to be fulfilled to maximize the potential of this technology. These include increasing the comfort of the wearable device on the skin and the ability to acquire as much human physiological information as possible.


In this regard, organic electronics could offer significant advantages compared to conventional silicon technologies, due to the intrinsic bendability and versatile sensing functionalities of organic materials. However, wearable and implantable electronics relies on batteries and warrants low-cost electronic devices, so minimizing power consumption and fabrication costs while maximizing electrophysiological signal amplification are important.

To demonstrate ultralow power and high gain operation, the researchers designed the transistors using a material system that yields a large band-gap in the channel layer along with a Schottky contact at the source. This enabled operation in the near OFF-state where current levels are in the range of femtoamperes. This development is of significance because the emission current into the channel of the Schottky-barrier thin-film transistor is determined by the reverse saturation current of the Schottky barrier at the source, which in turn, is modulated by the gate voltage, giving rise to the attributes of ultralow power consumption and a signal amplification efficiency that approaches the theoretical limit of q/kT. The transistor produces a large intrinsic gain that is independent of the drain voltage. This bias independence of gain and zero input current, by virtue of the insulated gate, makes the device capture the best of the bipolar junction transistor and MOSFET technology families. Compared to other thin film technologies such as silicon or metal oxides, power consumption is a thousand times lower and the signal-to-noise ratio a hundred times better.

Besides near OFF-state operation for ultralow power, a key determinant of low voltage operation is the semiconductor-insulator interface. In contrast to conventional perceptions of achieving low voltage through high-k (dielectric constant) and/or ultrathin gate dielectrics, their design approach was not restricted to this but rather aimed at achieving high interface integrity. A minimized defect density at the interface yields low voltage operation despite a small gate capacitance. The printed transistor utilizes an ultra-smooth polymer dielectric, free of dangling bonds and with a surface roughness of 2.1 Å, which is comparable to the silicon-silicon dioxide interface in the ubiquitous CMOS technology.


This is the first time such a high-performance printed transistor has been achieved that demonstrates good reliability under real-world conditions with a threshold voltage shift of less than a millivolt over a three-month-period. Based on this transistor architecture, they printed an ultralow power high gain amplifier, demonstrating detection of electrophysiological signals with a signal-to-noise ratio in excess of 60 decibels at less than 1 nanowatt of power.

Wearable and implantable electronics require sensing many different biology-electronics interfaces, of which the electrical signals are normally smaller than a few millivolts. This printed transistor technology has opened new possibilities in these emerging electronic applications by providing high electrical performance while minimizing fabrication cost and operation power consumption.

These findings are described in the article entitled Printed subthreshold organic transistors operating at high gain and ultralow power, recently published in the journal Science


About The Author

Dr. Chen Jiang is currently a Research Associate at the University of Cambridge. He received the B.S. degree in engineering from Shanghai Jiao Tong University, China, in 2014, and his Ph.D. degree in engineering at the University of Cambridge, UK, in 2019. In his Ph.D. study, he worked on exploring novel electronic devices for low-power, low-cost electronics, encompassing device fabrication, and device physics and modeling. His research interests include novel electronic device architectures, printable large-area electronics, and low-power circuits for wearable/implantable sensor interface systems. He was the winner of the Cambridge Society for the Application of Research Award 2018 and also a receipt of the IEEE Electron Device Society Ph.D. Student Fellowship 2018.

Dr. Arokia Nathan is currently the Chief Technical Officer of Cambridge Touch Technologies, a company spun out of the University of Cambridge developing advanced interactive technologies. He received the Ph.D. degree in electrical engineering from the University of Alberta. Following post-doctoral years at LSI Logic Corp., USA, and ETH Zurich, Switzerland, he joined the University of Waterloo, Canada, where he held the DALSA/NSERC Industrial Research Chair in sensor technology and subsequently the Canada Research Chair in nano-scale flexible circuits. He was a recipient of the 2001 NSERC E.W.R. Steacie Fellowship. In 2006, he moved to the U.K. to take up the Sumitomo Chair of Nanotechnology at the London Centre for Nanotechnology, University College London, and subsequently held the Chair of Photonic Systems and Displays in the Department of Engineering, Cambridge University, where he led a multi-disciplinary research group working on the heterogeneous integration of materials and processes, sensors, energy harvesting and storage devices pertinent to wearable technologies. He received the Royal Society Wolfson Research Merit Award and recently the BOE Distinguished Contribution Award for TFT Compact Modeling and Circuit Design. He has held Visiting Professor appointments at the Physical Electronics Laboratory, ETH Zürich and the Engineering Department, Cambridge University, UK. He has published over 600 papers in the field of sensor technology, CAD, thin film transistor electronics, and is a co-author of four books. He has over 100 patents filed/awarded and has founded/co-founded four spin-off companies. He serves on technical committees and editorial boards in various capacities.

Dr. Nathan is a Chartered Engineer (UK), Fellow of the Institution of Engineering and Technology (UK), Fellow of IEEE (USA), and an IEEE/EDS Distinguished Lecture.